reg [7:0] led;reg [25:0] count;always @ (posedge clk ) begin if(rst || count[25]==1) begin count<=26'b0;end else count<=count+1;end always @ (posedge clk) begin if(rst)led<=8'b0000_0001
LED_Data_Port[7:0] <= 8'b0000_0000;//8'b1111_1111;endcase end endmodule
reg [24:0] speed;//速度 reg [3:0] state;//状态,[3]=1:正转;[3]=0:翻转;{2,0}速度 always @(posedge clk or negedge rst)//自动变频流水灯 if (!rst)begin statelt;=4;d0;ledlt;=8;b00000001;co
下面给一个 led 流水灯的实例：8个LED 从左到右依次点亮 module led ( input wire Clock, input wire RESET_N, output wire [7:0] LED ); // --- count 1s ---reg [27:0] cnt_1s;reg
这个其实可以用一个时钟来做8bit的计数器，8个bit的输出结果就是的8路流水灯。module ex(input clk , output reg [7:0]cnt ，input rst );always (posedge clk or neg edge rst )if (!rst )cnt <=0;else c
用verilog写8路频率不同流水灯?
void yiwei();void delay(unsigned int b);void main()TMOD=0x01; //T0为方式1 TH0=(65536-50000)/256;TL0=(65536-50000)%256; //初值 EA=1; //允许中断 ET0=1;while(1)P2=0x00;delay(2000);LED
汇编语言程序如下：;假设1：D1~D8八个彩灯接在P1口，输出低电平发光 ;假设2：系统晶振为12MHz ;假设3：N = 5 ;程序如下：ORG 0000H MOV R3, #5 ;N=5 LOOP0:MOV A, #0FFH MOV P1, #0FFH ;开始时
4'd3:LED_Data_Port[7:0] <= 8'b0000_0010;//8'b1110_0111;4'd4:LED_Data_Port[7:0] <= 8'b0000_0100;//8'b1111_1111;4'd5:LED_Data_Port[7:0] <= 8'b0000_1000;//8'b0001_1000;4'd6:
reg [24:0] count;//计数器 reg [24:0] speed;//速度 reg [3:0] state;//状态,[3]=1:正转;[3]=0:翻转;{2,0}速度 always @(posedge clk or negedge rst)//自动变频流水灯 if (!rst)begin statelt;
// 设置初始值 else led_set <= {1'b0,led_set[7:1]}; // led 依次移位 endend 下面给一个 led 流水灯的实例：8个LED 从左到右依次点亮 module led ( input wire Clock, input wire RESE
请问如何用verilog写8个流水灯
void delay(unsigned int b);void main()TMOD=0x01; //T0为方式1 TH0=(65536-50000)/256;TL0=(65536-50000)%256; //初值 EA=1; //允许中断 ET0=1;while(1)P2=0x00;delay(2000);LED = 0x7f;m =
;假设1：D1~D8八个彩灯接在P1口，输出低电平发光 ;假设2：系统晶振为12MHz ;假设3：N = 5 ;程序如下：ORG 0000H MOV R3, #5 ;N=5 LOOP0:MOV A, #0FFH MOV P1, #0FFH ;开始时全灭 ;---逐个
module LED_Module(Clock,LED_Data_Port);input Clock;output LED_Data_Port;reg [7:0] LED_Data_Port; //LED数据口 reg [3:0] led_d; //LED显示数据 //=== integer cnt_led;//=== always @(posedge
reg [24:0] count;//计数器 reg [24:0] speed;//速度 reg [3:0] state;//状态,[3]=1:正转;[3]=0:翻转;{2,0}速度 always @(posedge clk or negedge rst)//自动变频流水灯 if (!rst)begin statelt;
// 设置初始值 else led_set <= {1'b0,led_set[7:1]}; // led 依次移位 endend 下面给一个 led 流水灯的实例：8个LED 从左到右依次点亮 module led ( input wire Clock, input wire RESE
如何用verilog写8个流水灯
A,#80HLOOP1: MOV P1,A SETB C RRC A LCALL DELAY DJNZ R2,LOOP1 SJMP MAINDELAY: MOV R2,#200DLY: MOV R3,#250 DJNZ R3,$ DJNZ R2,DLY RET END
51单片机八个灯的流水灯代码：1、用精确定时的方法，设置流水灯运行时的时间间隔，延时时间为500MS。2、#include "reg51.h"首先写出单片机的头函数。3、#include "intrins.h"输入位移函数。4、unsigned int count=0,led;
void delay(unsigned int b);void main()TMOD=0x01; //T0为方式1 TH0=(65536-50000)/256;TL0=(65536-50000)%256; //初值 EA=1; //允许中断 ET0=1;while(1)P2=0x00;delay(2000);LED = 0x7f;m =
;假设1：D1~D8八个彩灯接在P1口，输出低电平发光 ;假设2：系统晶振为12MHz ;假设3：N = 5 ;程序如下：ORG 0000H MOV R3, #5 ;N=5 LOOP0:MOV A, #0FFH MOV P1, #0FFH ;开始时全灭 ;---逐个
module LED_Module(Clock,LED_Data_Port);input Clock;output LED_Data_Port;reg [7:0] LED_Data_Port; //LED数据口 reg [3:0] led_d; //LED显示数据 //=== integer cnt_led;//=== always @(posedge
reg [24:0] count;//计数器 reg [24:0] speed;//速度 reg [3:0] state;//状态,[3]=1:正转;[3]=0:翻转;{2,0}速度 always @(posedge clk or negedge rst)//自动变频流水灯 if (!rst)begin statelt;
// 设置初始值 else led_set <= {1'b0,led_set[7:1]}; // led 依次移位 endend 下面给一个 led 流水灯的实例：8个LED 从左到右依次点亮 module led ( input wire Clock, input wire RESE
如何用verilog写8个流水灯
你好，下面是对应的代码，另外时钟的频率不要太高否者实际的那个灯可能会看不来。 module show(clk, reset, ledLight) input clk,reset; output [9:0] ledLight; reg [10:0] count ; always @(posdge clk or negedge reset) if (!reset) count =0; else if (count ==10) count =1; else count = count +1 assign ledLight[0] = (count ==1)? 1 :0; assign ledLight[1] = (count ==2)? 1 :0; assign ledLight[2] = (count ==3)? 1 :0; assign ledLight[3] = (count ==4)? 1 :0; assign ledLight[4] = (count ==5)? 1 :0; assign ledLight[5] = (count ==6)? 1 :0; assign ledLight[6] = (count ==7)? 1 :0; assign ledLight[7] = (count ==8)? 1 :0; assign ledLight[8] = (count ==9)? 1 :0; assign ledLight[9] = (count ==10)? 1 :0; endmodulemodule ledwater(clk,led,s) input clk; input[1:0]s; output[7:0]led; reg [7:0] led=0; reg [1:0] olds=0; always@(posedge clk) olds<=s; always@(posedge clk) if (olds^s) case (s) 2'b00: led<=1; //*a 2'b01: led<=1; 2'b10: led<=8'b1010_1010; 2'b11: led<=8'b0000_0111; endcase else case (s) 2'b00: led<={led[6:0],led[7]};//*b 2'b01: led<={led[0], led[7:1]}; 2'b10: led<=~led; 2'b11: led<={led[6:0],led[7]}; endcaseendmodule//第一种：一个灯亮，从右往左逐个移动，并循环//第二种：一个灯亮，从左往右逐个移动，并循环//第三种：一个间一个灯亮，并交替循环//第四种：三个灯亮，从右往左逐个移动，并循环//当然可以再多一些花样：//如：灯从右往左逐步点亮// *a改为: led<=1;// *b改为: led<= (&led)? 1: {led[6:0],1'b1};
先把问题具体化： 假如 LED “1” 为 亮，“0”为灭，需要 LED 每一秒，从左到右点亮，该如何做？ 那么这就有二个具体的问题： A、一秒如何产生？ 如果你的平台时钟是 50Mhz ，也就 clk = 50Mhz，那么利用分频计数来产生1hz的时钟，也就是 时钟周期为 1秒。实例如下： reg [31:0] cnt;reg clk_1;always@（posedge clk_50M or negedge rst_n） begin if(!rst_n) begin cnt <= 32'd0; clk_1 <= 1'b0; end else begin if(cnt == 32'd50_000_000-1) clk_1 <= ～clk_1; else cnt <= cnt + 1; endend B、如何从左向右点亮？ 点亮只需要LED设置为是“1”，从左往右，也就是高位到低位依次为“1”，根据clk_1s 的时钟，对LED进行移位就好了。这里有个问题，当LED移位到为全“0”的时候，则需要将 LED 写成初始值，这样就可以一直 循环点亮 下去。实例如下： always @(posedge Clk_1s or negedge RESET_N) begin if(!RESET_N) begin led_set <= 8'b0000_0000; end else begin if(led_set == 8'b0000_0000) led_set <= 8'b1000_0000; // 设置初始值 else led_set <= {1'b0,led_set[7:1]}; // led 依次移位 endend 下面给一个 led 流水灯的实例： 8个LED 从左到右依次点亮 module led ( input wire Clock, input wire RESET_N, output wire [7:0] LED ); // ---- count 1s ---------reg [27:0] cnt_1s;reg clk_1s_en; always @(posedge Clock or negedge RESET_N)begin if(!RESET_N) begin cnt_1s <= 0; clk_1s_en <= 0; end else begin if(cnt_1s == 'd50_000_000-1) begin cnt_1s <= 0; clk_1s_en <= ~clk_1s_en; end else cnt_1s <= cnt_1s + 1; endend // ----------- led set --------------reg [7:0] led_set; always @(posedge clk_1s_en or negedge RESET_N) begin if(!RESET_N) begin led_set <= 8'b0000_0000; end else begin if(led_set == 8'b0000_0000) led_set <= 8'b1000_0000; else led_set <= {1'b0,led_set[7:1]}; endend assign LED = led_set;endmodule
module ledwater(clk,led,s) input clk; input[1:0]s; output[7:0]led; reg [7:0] led=0; reg [1:0] olds=0; always@(posedge clk) olds<=s; always@(posedge clk) if (olds^s) case (s) 2'b00: led<=1; //*a 2'b01: led<=1; 2'b10: led<=8'b1010_1010; 2'b11: led<=8'b0000_0111; endcase else case (s) 2'b00: led<={led[6:0],led[7]};//*b 2'b01: led<={led[0], led[7:1]}; 2'b10: led<=~led; 2'b11: led<={led[6:0],led[7]}; endcaseendmodule//第一种：一个灯亮，从右往左逐个移动，并循环//第二种：一个灯亮，从左往右逐个移动，并循环//第三种：一个间一个灯亮，并交替循环//第四种：三个灯亮，从右往左逐个移动，并循环//当然可以再多一些花样：//如：灯从右往左逐步点亮// *a改为: led<=1;// *b改为: led<= (&led)? 1: {led[6:0],1'b1};
module first_soft (clk, rst, led);//port input clk, rst; output [7:0] led; reg [7:0] led; reg [24:0] count;//计数器 reg [24:0] speed;//速度 reg [3:0] state;//状态,[3]=1:正转;[3]=0:翻转;{2,0}速度 always @(posedge clk or negedge rst)//自动变频流水灯 if (!rst) begin statelt;=4;d0; ledlt;=8;b00000001; countlt;=25;d0; speedlt;=25;d20000000; end else begin countlt;=count+1;b1; if (count==speed) begin countlt;=25;d0;//计数器复位 if (state[3]==0)//转移发光二极管 begin ledlt;=ledlt;lt;1;b1; if (led==8;b01000000) state[3]lt;=1;b1; end else begin ledlt;=led;;1;b1; if (led==8;b00000010) begin case (state[2:0]) 3;b000: begin speedlt;=25;d10000000; state[3:0]lt;=4;b0001; end 3;b001: begin speedlt;=25;d5000000; state[3:0]lt;=4;b0010; end 3;b010: begin speedlt;=25;d2500000; state[3:0]lt;=4;b0011; end 3;b011: begin speedlt;=25;d1200000; state[3:0]lt;=4;b0100; end 3;b100: begin speedlt;=25;d2500000; state[3:0]lt;=4;b0101; end 3;b101: begin speedlt;=25;d5000000; state[3:0]lt;=4;b0110; end 3;b110: begin speedlt;=25;d10000000; state[3:0]lt;=4;b0111; end 3;b111: begin speedlt;=25;d20000000; state[3:0]lt;=4;b0000; end default: begin speedlt;=25;d20000000; state[3:0]lt;=4;b0000; end endcase end end end end endmodule
你好，下面是对应的代码，另外时钟的频率不要太高否者实际的那个灯可能会看不来。 module show(clk, reset, ledLight) input clk,reset; output [9:0] ledLight; reg [10:0] count ; always @(posdge clk or negedge reset) if (!reset) count =0; else if (count ==10) count =1; else count = count +1 assign ledLight[0] = (count ==1)? 1 :0; assign ledLight[1] = (count ==2)? 1 :0; assign ledLight[2] = (count ==3)? 1 :0; assign ledLight[3] = (count ==4)? 1 :0; assign ledLight[4] = (count ==5)? 1 :0; assign ledLight[5] = (count ==6)? 1 :0; assign ledLight[6] = (count ==7)? 1 :0; assign ledLight[7] = (count ==8)? 1 :0; assign ledLight[8] = (count ==9)? 1 :0; assign ledLight[9] = (count ==10)? 1 :0; endmodule
